CHIP PACKAGE STRUCTURE
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United States of America Patent
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N/A
Issued Date -
Sep 3, 2015
app pub date -
Feb 4, 2015
filing date -
Feb 28, 2014
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
In one embodiment, a chip package structure can include: (i) a substrate; (ii) a top chip including a plurality of vias arranged through the top chip to form electrical connections between an active surface of the top chip and a back surface of the top chip; (iii) a redistribution layer arranged on the back surface of the top chip; and (iv) a plurality of wire bonds that form electrical connections between the substrate and electrodes on the redistribution layer on the back surface of the top chip.
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