Memory controller, memory system, and memory control method

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United States of America Patent

PATENT NO 9520901
APP PUB NO 20150254134A1
SERIAL NO

14446463

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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According to one embodiment, a memory controller includes a writing destination management unit which determines a writing destination of user data, an encoding unit which generates a parity of the user data, and an ECC management unit which measures a fatigue degree of each certain memory area of a nonvolatile memory, selects an encoding method to instruct the encoding unit to be performed according to the encoding method, and changes the encoding method to an encoding method having a high error correction capability in a case where the fatigue degree corresponding to the writing destination is equal to or higher than a threshold and a total sum of parities is equal to or less than a predetermined amount.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hida, Toshikatsu Yokohama, JP 130 1577
Iwasaki, Kiyotaka Kawasaki, JP 39 257
Suzuki, Riki Yokohama, JP 62 270
Torii, Osamu Setagaya, JP 86 805
Yao, Hiroshi Yokohama, JP 85 1498

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