METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE

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United States of America Patent

APP PUB NO 20150255289A1
SERIAL NO

14430569

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Abstract

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A method for manufacturing a semiconductor structure is disclosed. The method comprises: a) providing an SOI substrate, and forming a gate stack on the SOI substrate; b) conducting amorphous implantation to source/drain regions, wherein process temperature of the amorphous implantation to the source region is higher than process temperature of the amorphous implantation to the drain region; c)performing the source/drain region doping; d) annealing to activate the impurities and recrystallize the amorphous region of the source/drain regions. In step b), the process temperature is higher than 50 in the amorphous implantation to the source region whereas the process temperature is lower than −30 in the amorphous implantation to the drain region. The present invention provides a method to generate defects under the source region. The defects can serve as discharge channels for the charges accumulated in the bulk region to reduce the impact of the floating bulk effect and to improve the reliability of the device.

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Patent Owner(s)

Patent OwnerAddress
INSTITUTE OF MICROELECTRONICS CHINESE ACADEMY OF SCIENCES100029 BEIJING CITY CHAOYANG DISTRICT BEITUCHENG WEST ROAD NO 3 CHINESE ACADEMY OF SCIENCES INSTITUTE OF MICROELECTRONICS MUNICIPAL DISTRICT BEIJING CITY 100029

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yin, Haizhou Poughkeepsie, US 241 2072
Zhu, Huilong Poughkeepsie, US 589 8348

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