SEMICONDUCTOR DEVICE WITH REDUCED WARPAGE
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United States of America Patent
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Issued Date -
Sep 10, 2015
app pub date -
Nov 18, 2014
filing date -
Mar 4, 2014
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor device with reduced warpage is disclosed and may, for example, include bonding at least two semiconductor die to a substrate, forming underfill material between the at least two semiconductor die and the substrate and between the at least two semiconductor die, and removing a portion of the underfill material between the at least two semiconductor die, thereby forming a groove. The at least two semiconductor die and the underfill material may, for example, be encapsulating utilizing an encapsulant. The groove may, for example, be filled using the encapsulant. The underfill material between the at least two semiconductor die may, for example, be removed utilizing laser etching. The underfill material between the at least two semiconductor die may, for example, be removed to a depth of 60-70% of a thickness of the at least two semiconductor die.
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