Importance

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Abstract

According to one embodiment, a plurality of first wirings are arranged along a first direction and a second direction that intersect each other and extending in a third direction perpendicular to the first and second directions. A plurality of second wirings extend in the second direction and are provided at predetermined intervals along the third direction of the first wirings. N channel field-effect transistors are provided at ends of the first wirings. Memory cells are placed at intersections of the first wirings and the second wirings. The memory cells are formed of a variable resistive layer of which the first wiring side is large in resistivity and the second wiring side is small in resistivity.

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First Claim