MEMORY SYSTEM AND MEMORY CONTROLLER

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United States of America Patent

APP PUB NO 20150261631A1
SERIAL NO

14332560

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Abstract

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According to one embodiment, a memory system includes a table management unit having a command information table, a data buffer configured to save second data obtained by dividing first data, a tag buffer configured to save a second tag corresponding to the second data and a data discarding unit configured to read the second data in the data buffer and transfer the read second data to a host. The memory system further includes a control unit configured to set the discard flag corresponding to the read command when an error occurs, and an entry processing unit configured to cause, when the table management unit acquires the second tag and a first discard flag of a first entry is set, the data discarding unit to discard third data, the first entry corresponding to the acquired second tag and being registered in the command information table.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KURIHARA, Junji Yokohama-shi, JP 3 12

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