HOST BRIDGE WITH CACHE HINTS
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United States of America Patent
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Issued Date -
Sep 17, 2015
app pub date -
Mar 14, 2014
filing date -
Mar 14, 2014
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Abstract
Embodiments relate to an implementation of system memory to which a peripheral component interface (PCI) adapter is coupled via a host bridge. Cache hint controls are defined in a packet header for a memory request. The cache hint controls are configured to issue an instruction to retain a copy of a memory element in a cache structure.
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