Semiconductor device manufacturing method and semiconductor device

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United States of America Patent

PATENT NO 9153566
APP PUB NO 20150262878A1
SERIAL NO

14475560

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Abstract

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A semiconductor device manufacturing method includes forming grooves in a surface of a semiconductor substrate, stacking a plurality of semiconductor chips in each area of the semiconductor substrate surrounded by the grooves to form stacked bodies, forming a first sealing resin layer that covers spaces between the plurality of semiconductor chips and lateral sides of the stacked bodies, separating the semiconductor substrate to singulate the stacked bodies, mounting the stacked bodies on a wiring substrate, forming a second sealing resin layer that seals the stacked bodies on the wiring substrate, separating the wiring substrate to singulate a portion of the wiring substrate with a single stacked body thereon, and grinding a portion of the semiconductor substrate in a thickness direction from a side of the semiconductor substrate opposite to the stacked bodies, after forming the first sealing resin layer and before singulating the wiring substrate.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sato, Takao Yokkaichi Mie, JP 136 1346

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