INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTURE
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United States of America Patent
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Issued Date -
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app pub date -
Mar 14, 2014
filing date -
Mar 12, 2014
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
Dies (110) with integrated circuits are attached to a wiring substrate (120), possibly an interposer, and are protected by a protective substrate (410) attached to a wiring substrate. The dies are located in cavities in the protective substrate (the dies may protrude out of the cavities). In some embodiments, each cavity surface puts pressure on the die to strengthen the mechanical attachment of the die the wiring substrate, to provide good thermal conductivity between the dies and the ambient (or a heat sink), to counteract the die warpage, and possibly reduce the vertical size. The protective substrate may or may not have its own circuitry connected to the dies or to the wiring substrate. Other features are also provided.
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