Methods for performing extended wafer-level packaging (eWLP) and eWLP devices made by the methods
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United States of America Patent
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Apr 5, 2016
Grant Date -
Sep 17, 2015
app pub date -
Mar 14, 2014
filing date -
Mar 14, 2014
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Abstract
Methods are provided for making embedded Wafer-Level Packaging (eWLP) devices, packages and assemblies. The eWLP methods allow back side electrical and/or thermal connections to be easily and economically made at the eWLP wafer level without having to use thru-mold vias (TMVs) or thru-silicon vias (TSVs) to make such connections. In order to create TMVs, processes such as reactive ion etching or laser drilling followed metallization are needed, which present difficulties and increase costs. In addition, the eWLP methods allow electrical and optical interfaces to be easily and economically formed on the front side and/or on the back side of the eWLP wafer, which allows the eWLP methods to be used to form optoelectronic devices having a variety of useful configurations.
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