MEMORY CONTROL APPARATUS, INFORMATION PROCESSING APPARATUS AND CONTROL METHOD THEREOF, AND STORAGE MEDIUM
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United States of America Patent
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Issued Date -
Oct 1, 2015
app pub date -
Mar 11, 2015
filing date -
Mar 27, 2014
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Abstract
A memory control apparatus associates logical addresses with corresponding physical addresses in a non-volatile storage device, and divides the physical addresses in the non-volatile storage device into addresses for complete erasure and other addresses and manages those addresses in the divided manner if a complete erasure mode is set. In the case where data stored in the non-volatile storage device has been instructed to be erased based on a logical address, the memory control apparatus completely erases data at the physical address associated with the logical address in the case where the physical address belongs to the addresses for complete erasure, and cancels a link to the data at the physical address associated with the logical address in the case where the physical address does not belong to the addresses for complete erasure.
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