MEMORY CONTROLLER AND ASSOCIATED METHOD

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20150293840A1
SERIAL NO

14681099

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A memory controller is arranged for controlling the process of writing a page data to a memory, wherein the page data possesses a logical address. The memory controller includes a page buffer, a data pattern detector and a logical-physical address mapping table. The page buffer is used for buffering the page data. The data pattern detector is coupled to the page buffer, and used to detect whether the page data is a predetermined pattern, to generate a data pattern flag, and determine whether to write the page data to a physical address of the memory according to the data pattern flag. The logical-physical address mapping table is coupled to the data pattern detector, and is arranged for storing the data pattern flag and the logical address of the page data, and selectively generating and storing the physical address.

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Patent Owner(s)

Patent OwnerAddress
REALTEK SEMICONDUCTOR CORPNO 2 INNOVATION RD II HSINCHU SCIENCE PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Cheng-Yu Hsinchu City, TW 44 136
Cheng, Yu-Li Hsinchu County, TW 3 1

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