Method and apparatus for limiting access to an integrated circuit (IC)

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United States of America Patent

PATENT NO 9898625
SERIAL NO

14727299

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Abstract

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A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

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Patent Owner(s)

  • NXP USA, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Feddeler, James R Austin, US 30 358
Nagda, Miten H Austin, US 10 65
Olmos, Alfredo Austin, US 28 327
Pietri, Stefano Austin, US 54 461

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