Method to controllably etch silicon recess for ultra shallow junctions
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United States of America Patent
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Apr 26, 2016
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app pub date -
May 19, 2014
filing date -
May 19, 2014
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Abstract
A method of forming a semiconductor device that includes forming a germanium including material on source and drain region portions of a silicon containing fin structure, and annealing to drive germanium into the source and drain region portions of the fin structure. The alloyed portions of fin structures composed of silicon and germanium are then removed using a selective etch. After the alloyed portions of the fin structures are removed, epitaxial source and drain regions are formed on the remaining portions of the fin structure.
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