Network-on-chip (NoC) topology generation

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United States of America Patent

PATENT NO 9825779
APP PUB NO 20150341224A1
SERIAL NO

14722046

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Abstract

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A system and method of defining the topology of a network-on-chip. The IP sockets and their data transfer connectivity are defined. The location of each IP socket is defined. A number of switches are defined so that there is at least one switch within a distance from each IP socket, the distance being less than that over which a signal propagates within one clock cycle period. The switches are coupled by links. Links may comprise pipeline stages, storage buffers, and are characterized by a data width.

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Patent Owner(s)

Patent OwnerAddress
ARTERIS INC595 MILLICH DR SUITE 200 CAMPBELL CA 95008

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chapyzhenka, Aliaksei San Jose, US 3 37
Probell, Jonah Alviso, US 29 151
Tang, Monica San Jose, US 8 58
van, Ruymbeke Xavier Issy les Moulineaux, FR 7 131

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