Method of Measuring Overlay Error and a Device Manufacturing Method

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United States of America Patent

APP PUB NO 20160018742A1
SERIAL NO

14867606

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Abstract

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The overlay error of a target in a scribelane is measured. The overlay error of the required feature in the chip area may differ from this due to, for example, different responses to the exposure process. A model is used to simulate these differences and thus a more accurate measurement of the overlay error of the feature determined.

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Patent Owner(s)

Patent OwnerAddress
ASML NETHERLANDS B V5504 DR VELDHOVEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
VAN, DE KERKHOF Marcus Adrianus Helmond, NL 115 1631
VERSTAPPEN, Leonardus Henricus Marie Weert, NL 16 150

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