MEMORY SYSTEM

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United States of America Patent

SERIAL NO

14867925

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Abstract

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A memory system includes a controlling unit that configured to control data transfer between the first and the second memory. The controlling unit executes copy processing for, after reading out data stored in a first page of the second memory to the first memory, writing the data in a second page of the second memory, determines, when executing the copy processing, whether the error correction processing for the data read out from the first page is successful, stores, when the error correction processing is successful, corrected data in the first memory and writes the corrected data in the second page, and reads out, when the error correction processing is unsuccessful, the data from the first page to the first memory and writes the data not subjected to the error correction processing in the second page.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBATOKYO 105-8001

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hatsuda, Kosuke Tokyo, JP 99 1449
Matsudaira, Hiroki Tokyo, JP 20 235
Matsuzaki, Hidenori Tokyo, JP 114 1296
YANO, Junji Kanagawa, JP 80 1240

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