High speed complementary NMOS LUT logic

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9543950
APP PUB NO 20160020767A1
SERIAL NO

14611069

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Abstract

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A programmable logic is provided that uses only NMOS pass transistors to pass a true output signal to an internal true node and to pass a complement output signal to an internal complement node. The internal true and complement nodes are cross-coupled through PMOS transistors so that the discharge of one of the internal true and complement nodes switches on a corresponding one of the cross-coupled PMOS transistors to charge a remaining one of the internal true and complement nodes.

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Patent Owner(s)

  • LATTICE SEMICONDUCTOR CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gunaratna, Senani Los Gatos, US 13 51
Sharpe-Geisler, Brad San Jose, US 30 172
Yew, Ting San Jose, US 13 41

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