Interconnect level structures for confining stitch-induced via structures
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United States of America Patent
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Jun 21, 2016
Grant Date -
Jan 28, 2016
app pub date -
Oct 2, 2015
filing date -
Mar 25, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A design layout is provided such that an underlying conductive line structure underlies a stitch region in an overlying conductive line structure. A stitch-induced via structure can be formed between the underlying conductive line structure and the overlying conductive line structure when a stitch region in a hard mask layer is etched multiple times. At least one of the underlying conductive line structure and the overlying conductive line structure is electrically isolated from other conductive line structures in a same design level so as to avoid unintentional electrical shorts.
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