Importance

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Abstract

A panel self-refresh system includes a timing controller configured to receive a command or an incoming frame from a processor, the incoming frame being forwarded to a display panel in a normal state. The system also includes a frame buffer configured to store the incoming frame in a cache state or an update state, contents of the frame buffer being read as an outgoing frame to the display panel in a self-refresh state. The timing controller generates a reset signal to a gate driver when the processor sends an update command for entering the update state or sends an exit command for entering a resynchronization state, scan signals outputted from a gate driver being de-asserted and staying in a vertical blanking interval until a next incoming frame is received from the processor.

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First Claim