Systems And Methods for Exposing A Current Processor Instruction Upon Exiting A Virtual Machine

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United States of America Patent

SERIAL NO

14489801

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Described systems and methods enable a host system to efficiently perform computer security activities, when operating in a hardware virtualization configuration. A processor is configured to generate a VM suspend event (e.g., a VM exit or a virtualization exception) when software executing within a guest VM performs a memory access violation. In some embodiments, the processor is further configured to save disassembly data determined for the processor instruction which triggered the VM suspend event to a special location (e.g., a specific processor register) before generating the event. Saved disassembly data may include the contents of individual instruction encoding fields, such as Prefix, Opcode, Mod R/M, SIB, Displacement, and Immediate fields on Intel® platforms.

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Patent Owner(s)

Patent OwnerAddress
BITDEFENDER IPR MANAGEMENT LTDCYPRUS NICOSIA NICOSIA NICOSIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
LUKACS, Sandor Floresti, RO 57 1472
LUTAS, Andrei V Satu Mare, RO 23 514

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