Methodology for annealing group III-nitride semiconductor device structures using novel weighted cover systems

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United States of America Patent

PATENT NO 10460955
APP PUB NO 20160061528A1
SERIAL NO

14833774

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An improved methodology for annealing group III-nitride semiconductor device structures using novel weighted cover systems that protect an annealing cap during the semiconductor annealing process is disclosed. The weighted cover system is configured for preventing the escape of nitrogen from the capped semiconductor during annealing. In one particular embodiment, the weighted cover system comprises a protective cover configured to be placed on the capped semiconductor during the anneal, and one or more weights configured to be placed on the protective cover to provide sufficient downward force to the protective cover that is placed on the capped semiconductor.

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ARMY UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE THE101 ARMY PENTAGON WASHINGTON DC USA 20310

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Derenge, Michael A Columbia, US 3 7

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