MEMORY SYSTEM AND METHOD USING STACKED MEMORY DEVICE DICE
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United States of America Patent
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Issued Date -
Mar 10, 2016
app pub date -
Aug 14, 2015
filing date -
Nov 25, 2011
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Abandoned
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Abstract
A method and apparatus for organizing memory for a computer system including a plurality of memory devices, connected to a logic device, particularly a memory system having a plurality of stacked memory dice connected to a logic die, with the logic device having capability to analyze and compensate for differing delays to the stacked devices stacking multiple dice divided into partitions serviced by multiple buses connected to a logic die, to increase throughput between the devices and logic device allowing large scale integration of memory with self-healing capability.
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