SEMICONDUCTOR MEMORY DEVICE HAVING COUNT VALUE CONTROL CIRCUIT
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United States of America Patent
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Issued Date -
Mar 17, 2016
app pub date -
Nov 7, 2014
filing date -
Nov 8, 2013
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A device includes a data storing cell array including a plurality of groups of data storing cells each configured to be accessed responsive to the input of the corresponding one of the row addresses and a count value control circuit coupled to each of the groups of the data storing cells. The count value control circuit is configured to update a count value stored in each of the groups of data storing cells by a first value responsive to the input of the corresponding one of the row addresses in a first operation mode and to set the count value stored in each of the groups of the data storing cells to a second value responsive to the input of the corresponding one of the row addresses in a second operation mode.
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