MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

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United States of America Patent

APP PUB NO 20160093801A1
SERIAL NO

14637622

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Abstract

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According to one embodiment, a memory device includes a substrate, a first wiring layer including a first interconnect extending in a first direction which is disposed on the substrate, a second wiring layer including a second interconnect which is disposed so as to extend in a second direction intersecting the first direction above the first wiring layer, a memory cell which is disposed between the first interconnect and the second interconnect, and a pattern which is spaced from the memory cell. The memory cell and the pattern, respectively, includes a resistance change layer which is disposed between the first wiring layer and the second wiring layer, and an electrode layer which is provided below the second wiring layer and directly above the resistance change layer, and the memory cell further including a metal source layer which is provided between the resistance change layer and the electrode layer.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 105-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
NISHIHARA, Kiyohito Yokkaichi, JP 39 539

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