METHOD AND CIRCUIT FOR ELIMINATING TRANSFORMER SATURATION IN THE PRESENCE OF DC OFFSET VOLTAGE
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United States of America Patent
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Issued Date -
Mar 31, 2016
app pub date -
Sep 11, 2015
filing date -
Sep 29, 2014
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A DC offset voltage in an AC input voltage to a transformer and associated saturation current are eliminated by the placement of an anti-parallel diode pair circuit in series between a source of the AC input voltage and a primary winding of the transformer. The anti-parallel diode pair circuit has an input coupled to an output by parallel connected oppositely biased branch diode circuits. Each branch diode circuit has at least one diode where the diode of one such branch diode circuit is biased in one direction and the diode of the other such branch diode circuit is biased in an opposite direction and each branch diode circuit has the same number of diodes as the other branch diode circuit.
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