Importance

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Abstract

According to one embodiment, a semiconductor memory device includes a substrate that includes a first region and a second region; a stacked body that is disposed on the first region of the substrate and includes a plurality of first metal layers and a plurality of voids each of which is disposed between the plurality of first metal layers; a columnar portion that penetrates the stacked body, extends in a direction of stacking in the stacking body; a transistor that is disposed on the second region; and the interconnect portion that is disposed on the transistor and includes the plurality of first metal layers and a plurality of second metal layers each of which is disposed between the plurality of first metal layers. The transistor is electrically connected to the channel body or the first metal layer of the stacked body through a interconnect portion.

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First Claim