Low power equalizer and its training

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United States of America Patent

PATENT NO 9660842
SERIAL NO

14129267

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Abstract

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Described is an apparatus which comprises: samplers operable to perform linear equalization training and to perform function of an un-rolled decision feedback equalizer (DFE); and logic to select output of offset samplers, from among the samplers, when two adjacent bits of an input signal are the same. Described is an equalization scheme which comprises a linear equalizer (LE) operable to match a first post-cursor residual ISI tap to a first pre-cursor residual ISI tap for a non-lone bit transition of the input signal.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bou, Sleiman Sleiman Chandler, US 1 12
Johnson, Luke A Queen Creek, US 39 424

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