Structure and method to make strained FinFET with improved junction capacitance and low leakage
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United States of America Patent
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May 16, 2017
Grant Date -
May 12, 2016
app pub date -
Dec 28, 2015
filing date -
Mar 10, 2014
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Abstract
A method of forming a semiconductor device that includes forming a gate structure on a fin structure and etching the source and drain region portions of the fin structure to provide a recessed surface. A first semiconductor layer is formed on the recessed surface of the fin structure that is doped to a first conductivity type. A leakage barrier layer is formed on the first semiconductor layer. A second semiconductor layer is formed on the leakage barrier layer. The second semiconductor layer is doped to a second conductivity type.
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