Bypassing a higher level register file in a processor having a multi-level register file and a set of bypass registers
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United States of America Patent
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May 1, 2018
Issued Date -
N/A
app pub date -
Feb 2, 2016
filing date -
Oct 31, 2012
priority date (Note) -
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Abstract
A register file bypass controller in communication with a set of one or more bypass registers, the register file bypass controller configured to receive a register file bypass request; determine whether to grant the register file bypass request; determine whether data identified by the register file bypass request is present in the set of one or more bypass registers in response to determining to grant the register file bypass request; determine a selected bypass register in the set of one or more bypass registers in response to determining the data identified by the register file bypass request is not present in the set of one or more bypass registers; determine to store the data identified by the register file bypass request in the selected bypass register; and notify an execution unit to cancel instruction execution associated with the data identified by the register file bypass request.
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