CHARGE ORDERED VERTICAL TRANSISTORS

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20160155941A1
SERIAL NO

14815024

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A vertical charge ordered transistor is disclosed. A thin charge ordered layer is employed as a tunnel barrier between two electrodes. A gate-induced accumulation of charge destabilizes the charge ordered state around the circumference of the device, opening up a parallel ohmic conduction channel, which leads to an exponential increase in source-drain current. VCOT devices have the potential to exhibit very large on/off ratios, low off-state currents, and sub-threshold slopes below 60 mV/dec.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
THE TRUSTEES OF THE UNIVERSITY OF PENNSYLVANIAPHILADELPHIA PA 19104

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Devlin, Robert Charles Abington, US 5 56
May, Steven Philadelphia, US 3 11
Rappe, Andrew Marshall Penn Valley, US 6 37
Rondinelli, James Philadelphia, US 2 9
Spanier, Jonathan Bala Cynwyd, US 2 9
Taheri, Mitra Philadelphia, US 2 9

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation