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United States of America Patent

SERIAL NO

15051373

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Abstract

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A first, a second, and a third computing circuit respectively generate a first post-computation signal with a second harmonic component reduced as compared with first and second signals, a second post-computation signal with the second harmonic component reduced as compared with third and fourth signals, and a third post-computation signal with the second harmonic component reduced as compared with fifth and sixth signals. A fourth and a fifth computing circuit respectively generate a fourth post-computation signal with a third harmonic component reduced as compared with the first and second post-computation signals, and a fifth post-computation signal with the third harmonic component reduced as compared with the second and third post-computation signals. A sixth computing circuit determines a detected angle value based on the fourth and fifth post-computation signals.

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Patent Owner(s)

Patent OwnerAddress
TDK CORPORATION2-5-1 NIHONBASHI CHUO-KU TOKYO 103-6128

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
HIRABAYASHI, Hiraku Tokyo, JP 149 733
HIROTA, Yohei Tokyo, JP 28 97
TOKIDA, Homare Tokyo, JP 8 52
YAMAWAKI, Kazuma Tokyo, JP 14 17

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