FinFET spacer without substrate gouging or spacer foot
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United States of America Patent
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Oct 17, 2017
Issued Date -
N/A
app pub date -
Dec 12, 2014
filing date -
Dec 12, 2014
priority date (Note) -
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Abstract
The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of forming a spacer adjacent to a gate in a fin field effect transistor (FinFET) device without resulting in substrate gouging or a spacer foot. A conformal spacer layer may be formed around a plurality of fins and a gate, wherein the conformal spacer layer may have a thickness above the plurality of fins that is at least one-half the distance between the individual fins. An isotropic etch may be used to remove excess spacer material around the plurality of fins (but not between the fins) and around the gate. An anisotropic etch may be used to remove the remaining spacer material from between the fins and around the gate, leaving a spacer adjacent to the gate without gouging the substrate surface between the fins.
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