Instruction set architecture with opcode lookup using memory attribute

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United States of America Patent

PATENT NO 9652239
SERIAL NO

15054515

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Abstract

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A method decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Muff, Adam J Woodinville, US 74 2136
Schardt, Paul E Rochester, US 145 3600
Shearer, Robert A Woodinville, US 163 4483
Tubbs, Matthew R Issaquah, US 92 2455

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