Exploiting frame-to-frame coherence for optimizing color buffer clear performance in graphics processing units
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United States of America Patent
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Mar 7, 2017
Grant Date -
Jun 23, 2016
app pub date -
Dec 19, 2014
filing date -
Dec 19, 2014
priority date (Note) -
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Abstract
A mechanism is described for dynamically optimizing color buffer clear performance in graphics processing units. A method of embodiments, as described herein, includes allocating and initializing a first set of control bits associated with a framebuffer in a graphics processing unit (GPU), and rendering a first frame, wherein the first set of control bits are associated with the first frame. The method may further include allocating a second set of control bits associated with a second frame, and rendering the second frame. The method may further include facilitating an expedited resolve operation of the second frame based on a frame-to-frame coherence associated with the first and second frames.
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