IMPLEMENTING DRAM ROW HAMMER AVOIDANCE
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United States of America Patent
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Issued Date -
Jun 23, 2016
app pub date -
Dec 17, 2014
filing date -
Dec 17, 2014
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Abstract
A method and apparatus for implementing row hammer avoidance in a dynamic random access memory (DRAM) in a computer system. Hammer detection logic identifies a hit count of repeated activations at a specific row in the DRAM. Monitor and control logic receiving an output of the hammer detection logic compares the identified hit count with a programmable threshold value. Responsive to a specific count as determined by the programmable threshold value, the monitor and control logic captures the address where a selected row hammer avoidance action is provided.
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