Semiconductor structures with deep trench capacitor and methods of manufacture
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United States of America Patent
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Jun 13, 2017
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app pub date -
Dec 23, 2014
filing date -
Dec 23, 2014
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Abstract
An integrated FinFET and deep trench capacitor structure and methods of manufacture are provided. The method includes forming deep trench capacitor structures in a silicon on insulator (SOI) wafer. The method further includes forming a plurality of composite fin structures from a semiconductor material of the SOI wafer and conductive material of the deep trench capacitor structures. The method further includes forming a liner over the deep trench capacitor structures including the conductive material of the deep trench capacitor structures. The method further includes forming replacement gate structures with the liner over the deep trench capacitor structures protecting the conductive material during deposition and etching processes.
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