HIGH BREAKDOWN VOLTAGE PASSIVE ELEMENT AND HIGH BREAKDOWN VOLTAGE PASSIVE ELEMENT MANUFACTURING METHOD

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United States of America Patent

SERIAL NO

14960257

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Abstract

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Warping of a semiconductor wafer occurring due to a difference in the thermal expansion rates of an insulating film and the semiconductor wafer is restricted. Therefore, processing failures and conveying failures in the manufacturing process, as well as cracking of the semiconductor wafer, are restricted. Provided is a high breakdown voltage passive element including a substrate, a lower metal layer and upper metal layer stacked on the substrate, and an insulating unit formed between the lower metal layer and upper metal layer, wherein the insulating unit has a first insulating film whose thermal expansion rate is lower than the thermal expansion rate of the substrate, and a second insulating film, formed on the first insulating film, whose thermal expansion rate is higher than the thermal expansion rate of the substrate.

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Patent Owner(s)

Patent OwnerAddress
FUJI ELECTRIC CO LTDKAWASAKI-SHI KANAGAWA 210-9530

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
YAMAJI, Masaharu Matsumoto-city, JP 54 291

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