Graph-based application programming interface architectures with producer/consumer nodes for enhanced image processing parallelism

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United States of America Patent

PATENT NO 9818166
SERIAL NO

14664736

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Abstract

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A flexible representation of fine grain image buffer validity is included in an image graph implementation API to provide a mechanism for a graph node developer to communicate limits of scheduling constraints imposed by a graph's source and destination images. An image graph executor may employ a producer and/or consumer node scoreboard object or function defined through the image graph implementation API to schedule work tasks to hardware resources in a more efficient manner. In some embodiments, an image processing engine is configured to begin processing completed source data blocks (e.g., image tiles) through an image graph before all upstream tasks associated with the source image are complete. In further embodiments, a destination image is to be indicated as at least partially complete so that work dependent on one more completed data blocks may begin before the destination image is fully buffered into memory.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Krasnov, Dmitry Nizhniy Novgorod, RU 3 59
Taylor, Stewart N Los Altos, US 13 127

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