Power converter with selective dead-time insertion
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United States of America Patent
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Feb 27, 2018
Issued Date -
N/A
app pub date -
Jan 21, 2015
filing date -
Jan 21, 2015
priority date (Note) -
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Abstract
A power converter has one or more phase legs, each with upper and lower switching devices. A current sensor detects a magnitude of a current flow from a respective leg. A gate driver activates the upper and lower devices according to gate signals determined in response to a PWM control signal. When the detected current magnitude is greater than a positive threshold then the lower gate signal includes a dead-time insertion and the upper gate signal does not include a dead-time insertion. When the detected current magnitude is less than a negative threshold then the upper gate signal includes a dead-time insertion and the lower gate signal does not include a dead-time insertion. When the detected current magnitude is between the positive threshold and the negative threshold then the upper gate signal and the lower gate signal both include a dead-time insertion. Output distortion and control delay are greatly reduced.
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