Tunable delay circuit and operating method thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 21, 2017
Issued Date -
N/A
app pub date -
Dec 31, 2015
filing date -
Jan 20, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A tunable delay circuit includes a first multiplexer, a delay chain, and a second multiplexer. The first multiplexer selects an input signal or a feedback signal as a first output signal according to an enable signal. The delay chain delays the first output signal for different time periods so as to generate a plurality of delay signals. One of the delay signals is used as the feedback signal. The second multiplexer selects one of the delay signals as a second output signal according to a pass signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully