HYBRID MEMORY ARCHITECTURE
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United States of America Patent
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Issued Date -
Aug 4, 2016
app pub date -
Jan 30, 2015
filing date -
Jan 30, 2015
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Abstract
Hybrid memory architecture technologies are described. In accordance with embodiments disclosed herein, there is provided a processing device having a core and a memory controller communicably coupled to the core to receive a request to fetch data. The memory controller is communicably coupled to a hybrid memory architecture including a near memory, wherein the near memory is divided into a flat memory region and a cache memory region.
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