Techniques for determining victim row addresses in a volatile memory

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United States of America Patent

PATENT NO 9824754
SERIAL NO

15000643

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Abstract

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Examples are disclosed for determining a logical address of one or more victim rows of a volatile memory based on a logical address of an aggressor row and address translation schemes associated with the volatile memory. Other examples are described and claimed.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Crawford, John H Santa Clara, US 41 1251
Mandava, Sreenivas Los Altos, US 16 206
Morris, Brian S Santa Clara, US 33 482
Rossin, Ted Fort Collins, US 2 88
Sah, Suneeta Portland, US 20 650
Stefaniw, Mathew W Santa Clara, US 2 88
Stevens, Roy M Lexington, US 9 221

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