Interconnect wires including relatively low resistivity cores

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United States of America Patent

PATENT NO 9691657
SERIAL NO

15096609

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Abstract

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A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes a core material surrounded by a jacket material, wherein the jacket material exhibits a first resistivity ρ1 and the core material exhibits a second resistivity ρ2 and ρ2 is less than ρ1.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chebiam, Ramanan V Hillsboro, US 32 293
Clarke, James S Portland, US 136 2676
Indukuri, Tejaswi K Portland, US 27 292
Yoo, Hui Jae Hillsboro, US 90 386

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