PACKAGED SEMICONDUCTOR DEVICES

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20160240500A1
SERIAL NO

14845826

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A packaged semiconductor device is provided, which includes a substrate comprising a contact pad; a passivation layer disposed on the substrate, where the passivation layer covers part of the contact pad; an under bump metallization (UBM) layer disposed on the substrate, where the UBM layer is coupled to the contact pad; a conductive bump disposed on the UBM layer, where the conductive bump comprises a column connecting the UBM layer and a cap disposed on top of the column; and a solder ball encapsulating the conductive bump. The cap includes a bottom area larger than a cross-sectional area of the column, and a bottom of the cap is distant from an upper surface of the passivation layer by a space.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
CHIPMOS TECHNOLOGIES INCNO 1 R&D RD 1 SCIENCE-BASED INDUSTRIAL PARK HSINCHU
CHIPMOS TECHNOLOGIES (BERMUDA) LTDCANON'S COURT 22 VICTORIA STREET HAMILTON HM 12

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
HUANG, CHUN FU HSINCHU, TW 1 10

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation