Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 1024-symbol mapping, and bit interleaving method using same
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United States of America Patent
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Oct 15, 2019
Grant Date -
Aug 18, 2016
app pub date -
Mar 20, 2015
filing date -
Feb 16, 2015
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Abstract
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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