Latch circuit and method of operating the latch circuit

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United States of America Patent

PATENT NO 9966935
SERIAL NO

14630941

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Abstract

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A latch circuit includes a first input node, a second input node, a first output node, a second output node, a first switching device coupled between the first output node and the second output node, and a first amplification circuit coupled with the first input node, the second input node, the first output node, and the second output node. The first switching device is configured to be turned on in response to a first state of a clock signal and to be turned off in response to a second state of the clock signal. The first amplification circuit is configured to cause a voltage difference across the first switching device based on voltage levels of the first input node and the second input node in response to the first state of the clock signal.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chern, Chan-Hong Palo Alto, US 205 1710
Huang, Ming-Chieh San Jose, US 116 892
Huang, Tsung-Ching (Jim) Mountain View, US 14 91
Lin, Chih-Chang San Jose, US 138 720
Yang, Tien-Chun San Jose, US 73 310

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