Techniques for fractional-N phase locked loops

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United States of America Patent

PATENT NO 9484939
APP PUB NO 20160248431A1
SERIAL NO

14383865

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Embodiments describe techniques for utilizing fractional-N phase locked loops (PLL). Some embodiments describe a fractional-divider based fractional-N PLL for a spread spectrum clock (SSC) generator that utilizes phase average techniques to suppress phase interpolator nonlinearity. Some embodiments describe a fractional-N PLL based on fractional dividers with hybrid finite impulse response (FIR) filtering. Some embodiments describe a small size and low power divider for a hybrid FIR fractional-N PLL.

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Patent Owner(s)

  • LATTICE SEMICONDUCTOR CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cao, Shengguo Shanghai, CN 4 22
Chu, Fangquing Mountain View, US 1 19
Luo, Kexin Shanghai, CN 11 95
Shen, Yu Beijing, CN 85 622
Wu, Zhi Shanghai, CN 25 64
Yue, Lingfen Shanghai, CN 1 19
Zhou, Kai Shanghai, CN 141 390

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