Nonvolatile semiconductor memory device having word line hookup region with dummy word lines
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United States of America Patent
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Apr 11, 2017
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app pub date -
Sep 2, 2015
filing date -
Mar 4, 2015
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Abstract
According to one embodiment, a nonvolatile semiconductor memory device comprises a memory cell array including a first selection gate, word lines and a second selection gate stacked above a semiconductor substrate, and a memory pillar disposed through the first selection gate, word lines and second selection gate, a hookup region disposed adjacent to the memory cell array region in a first direction, and a dummy region disposed outside the memory cell array region and the hookup region, the dummy region including dummy word lines, each provided at the same layer as the associated word line.
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