MEMORY CONTROLLER, DATA STORAGE DEVICE AND DATA WRITE METHOD
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United States of America Patent
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Issued Date -
Sep 15, 2016
app pub date -
Jun 29, 2015
filing date -
Mar 10, 2015
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
According to one embodiment, a memory controller includes a bank controller including a queuing part queuing commands associated with a bank and having a first flag associated with each of the commands, the bank controller executing the commands in order, a data controller transferring write data to the bank when a particular command to be executed among the commands is a write command associated with one of physical addresses in the bank, and a parity controller generating parity data for restoring the write data based on a value of a first flag associated with the particular command, before execution of the particular command is completed.
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